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Reliability and Reliability Testing


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Solder Vendors: Voiding Doesn't Affect Joint Reliability
Circuits Assembly
Thursday, 15 December 2005 : BANNOCKBURN, IL – A group of leading solder vendors today issued a statement asserting “no evidence” exists demonstrating voiding has “any significant impact” on solder joint reliability. 
(added on 18-Dec-2005)   

Via Life vs. Temperature Stress Analysis of Interconnect Stress Test
Circuitree
A new data analysis methodology provides significant insight into plated through via reliability versus thermal stress temperature. 
(added on 29-Mar-2005)   

Assessing Solder Joint Reliability in Pb-Free Assemblies
Circuits Assembly
Research finds that bulk alloy properties are not a meaningful predictor of reliability. 
(added on 18-Dec-2004)   

Why Test for Ionics Anymore?
SMT Magazine
Short background on ionic contamination testing. 
(added on 11-Sep-2004)   

Strain Gage Testing: Predicting and Preventing Brittle Fracture of BGAs
SMT Magazine
Article that promotes a new type of test, called Strain Gage Testing, as a method to determine whether a particular process step is exerting excessive strain on a BGA. 
(added on 27-Jun-2004)   

 

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BGA Reliability Characterization Project Temperature Cycling Tests Final Report
HDP User Group International, Inc.
This paper describes the investigation into the effects of temperature cycling of solder joint connections on the board level for a variety of ball grid array packages (BGA). Variables studied were package construction, package location on the circuit board, solder joint location on the package, and virgin versus reworked boards. Temperature cycle evaluations were conducted with real-time event monitoring and failed sites were subjected to failure analysis to determine cause of failure. The BGA Reliability Characterization Project Team performed this work, as part of the BGA Reliability Characterization Project of the HDP User Group (High Density Packaging User Group) 


Pb-Free Solder Joint Evaluation
AIM
Abstract: The goal of this study was to evaluate a totally Pb-free solder joint formed by using TI 4-layer Ni/Pd finish IC components, CASTIN Pb-free solder paste, and ENTEK® PLUS Organic Solderability Preservative (OSP) as the PWB surface finish. Mechanical tests performed included contact angle measurements and lead pull. Temperature cycle testing was performed to evaluate the package integrity after cycling through temperature extremes. The wetting balance test was used as a tool to determine the solder wetting time for the individual IC components.  


Electroless Ni/Immersion Au Evaluation - Final Program Report
Northern UK Circuit Group
HP-EADC has investigated the solder joint interfacial weakness associated with electroless nickel (Ni)/immersion gold (Au) printed circuit board (PCB) plating. In addition to investigating the potential root causes of this weakness, HP-EADC has developed a test that can be used to differentiate between acceptable and unacceptable solder joint strength. This report represents the HP-EADC E-Ni/I-Au program final report. 
(added on 27-Apr-2003)   


The Effects of Solder Mask Selection Cleanliness
Contamination Studies Laboratories
Some case studies illustrating how solder mask affects cleanliness and reliability of the end product. 


The Layman’s Guide to Qualifying A Process to J-STD-001B
Contamination Studies Laboratories
What you should no to qualify a process so that it meets the J-STD-001B specification 


Assembly of Large PBGAS on Printed Circuit Board with Large PQFPS Directly on the Opposite Side
Journal Of Electronics Manufacturing
A two-side no-clean mass reflow process for large plastic ball grid array (PBGA) and plastic quad flat pack (PQFP) packages is presented. Emphasis is placed on the PBGA and PQFP assembly parameters such as the design, materials, and process of the packages and printed circuit board (PCB), solder paste, stencil printing, pick and place, reflow, and inspection. Solder joint reliability of the two-side PCB assembly is evaluated by shear tests and thermal cycling tests.  


The Layman’s Guide to Qualifying New Fluxes For MIL-STD-2000A or MT-0002
Contamination Studies Laboratories
The purpose of this general paper, is to get back to that original easily understood test document and give you some practical guidance and technical pointers on how to go about demonstrating that your new process is capable of producing reliable hardware. 


Residues In Printed Wiring Boards and Assemblies
Contamination Studies Laboratories
This paper is an examination of residues on printed wiring boards and printed wiring assemblies. Sources of residues are illustrated and the effects of various residues are discussed. Case studies (5) are presented for bare board cleanliness issues, water soluble flux and aqueous cleaning processes, and low solids flux (no-clean) processes, with and without cleaning.  


Assessing The Reliability Of Plated Vias
PCFAB
When it comes to bare boards, are PTHs the weakest link? How fill material in buried core vias affects their reliability. 
(added on 22-May-2003)   


Highly Accelerated Thermal Shock Reliability Testing
Microtek Laboratories
This paper introduces a new methodology to investigate via reliability with thermal shock testing. 
(added on 12-Jul-2003)   


Qualifying a New Manufacturing Process
Contamination Studies Laboratories
Introduction to qualifying manufacturing process, focussed on process residues and the harm they may do to your products. 


The influence of PCB parameters on CSP assembly and reliability
Advanced Packaging
Extensive discussion about assembly and reliability of chip scale packages, and how these are affected by bare board parameters. 
(added on 17-May-2003)   


QUALIFYING A PROCESS TO J-STD-001B
Contamination Studies Laboratories
This paper addresses some of the fundamentals that have to be considered when qualifying a candidate process to the B revision of J-STD-001. 


The Consequences of Ignoring Residues
Contamination Studies Laboratories
Three case studies of what happened when a manufacturer was ignorant of the residue. 


Chip-Scale Package Assembly Reliability
Chip Scale Review Magazine
Although the weakest link of CSP assembly reliability is often internal package failure, solder-joint fatigue is still considered the key reliability factor. 


Accelerated Reliability Test Results: Importance of Input Vibration Spectrum and Mechanical Response of Test Article
UNHOLTZ-DICKIE CORPORATION
Repetitive Shock (RS) and Electrodynamic (ED) vibration systems produce substantially different vibration conditions at the input point to the test article. These differences are most evident in terms of peak G level and spectrum content.
The ''RS'' System produces vibration in short bursts which contain extremely high G amplitudes at the leading edge of each air hammer impact. The frequency content of the ''RS'' spectrum is non-uniform and exhibits many ''holes'' in the test spectrum.
The ''ED'' System produces a continuous vibration time history that contains peak G amplitudes that vary within a moderate, programmable range. The distribution of vibration energy over the test spectrum is uniform and easily programmed using accelerometer feedback (closed-loop) control.
The successful implementation of Accelerated Reliability Stress Testing requires a thorough understanding of a product's failure modes as well as the proper selection of the screening test system and its capabilities. Without prior knowledge of product responses and the actual dynamic inputs produced by the test system, effective stress test results may be unachievable. It has been shown that screening test results may be significantly different when the same product is tested on vibration systems with different operating characteristics and performance limitations. It follows, therefore, that the product's failure modes and the test system's operating characteristics must be understood before selecting the proper stress function, stress magnitude and type of test equipment.
 


Mechanical Strength Properties of Multilayer Chip Capacitors
KEMET
In this PDF-document the mechanical strength of multilayer ceramic chip capacitors are examined. The importance of test methods and parameters such as sample size, calculation of data, and test fixtures are adressed. Research data are presented which relate strength to process and material characteristics.  


Electronics Testing into the 21st Century:Success in Test Is in Capabilities, Not Specifications
Article from Equipment Reliability Institute 


Reliability of Multilayer Ceramic Capacitors After Thermal Shock
AVX Corporation
With increasing use of multilayer ceramic capacitors in surface mount applications, the understanding of thermal shock properties of these devices is becoming increasingly important. Of the various soldering techniques utilized in surface mount applications, including wave soldering imposes the most severe thermal stresses on the MLCs. To simulate this process, parts are often dipped in solder baths. It will be shown in this paper that properties like critical stress intensity factor K1C, thermal diffusivity, Young's modules and the chip geometry are important for understanding the thermal shock behavior of chips. Examples of the effects of K1c and chip geometryare shown. 
(added on 14-Sep-2003)   


Solder Ball Endurance
Advanced Packaging
Article about the mechanical reliability of ball grid arrays and chip scale package device families, discussing solder voiding and material properties. 
(added on 15-Sep-2003)   


In-field Assembly Failures - Expensive and Avoidable?
SMT Magazine
The interaction of cleaning with protective coating, together with weak-point analyses, all contribute to the fulfillment of long-term reliability requirements.  
(added on 26-Jan-2003)   


Vibration Testing and Screening of PCBs
Circuits Assembly
Avoid in-service vibration damage through the prior use of HALT, ESS and HASS. 
(added on 04-Oct-2003)   


Preventing Contamination with Process Optimization
SMT Magazine
This article gives insight into the tests and process optimization that can prevent that reliability of PCB's is destroyed by contamination. 
(added on 23-Aug-2003)   


Parameters Important For Surface Mount Applications Of Multilayer Ceramic Capacitors
AVX Corporation
This paper gives insight into the mechanical properties and thermal stress resistance parameters of multilayer ceramic capacitors, which is essential for zero defect soldering and sub ppm failure rates. 
(added on 20-Jul-2003)   


Component Compatibility for Cleaning
Circuits Assembly
Bob Willis describes some tests that can be done to verify compatibility of components with cleaning processes. 
(added on 22-Aug-2003)   


Thermal Performance of Lead-free Packages
Advanced Packaging
This article compares air-to-air thermal cyclic reliability and associated failure modes of second level interconnects in lead-free 1.27-mm-pitch 256 I/O ball grid array (BGA) devices by examining three leading lead-free alloys and comparing their performance to that of ordinary tin-lead eutectic solder. 
(added on 01-Jan-2004)   


Temperature cycling
Electronic Production
Electronics Production Magazine does not exist anymore, but their extremely usefull online-encyclopedia is still available from SMTinfo.net. This part gives an introduction to thermal cycling. 


Strain Gage Testing: Predicting and Preventing Brittle Fracture of BGAs
SMT Magazine
Article that promotes a new type of test, called Strain Gage Testing, as a method to determine whether a particular process step is exerting excessive strain on a BGA. 
(added on 27-Jun-2004)   


Solder Vendors: Voiding Doesn't Affect Joint Reliability
Circuits Assembly
Thursday, 15 December 2005 : BANNOCKBURN, IL – A group of leading solder vendors today issued a statement asserting “no evidence” exists demonstrating voiding has “any significant impact” on solder joint reliability. 
(added on 18-Dec-2005)   


Why Test for Ionics Anymore?
SMT Magazine
Short background on ionic contamination testing. 
(added on 11-Sep-2004)   


Assessing Solder Joint Reliability in Pb-Free Assemblies
Circuits Assembly
Research finds that bulk alloy properties are not a meaningful predictor of reliability. 
(added on 18-Dec-2004)   


Via Life vs. Temperature Stress Analysis of Interconnect Stress Test
Circuitree
A new data analysis methodology provides significant insight into plated through via reliability versus thermal stress temperature. 
(added on 29-Mar-2005)   


 


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